Design considerations for stacked Class-E-like mmWave high-speed power DACs in CMOS

Abstract

This work describes design considerations for realizing high power mmWave DACs with high efficiency under modulation based on switching-PA DAC cells. A stacked Class-E-like SOI CMOS power amplifier is turned ON/OFF by means of digital circuitry to sustain high-speed 1-bit ASK (OOK) modulation, while high average efficiency is achieved by means of supply-switching. Factors affecting modulation speed, dynamic power dissipation, impact of digital path delays and supply/ground bounce are discussed and design guidelines are provided. A fully-integrated 47GHz prototype has been fabricated in IBM's 45nm SOI CMOS technology. Measurement results yield a saturated output power of 18.2 dBm with a peak PAE of 15.3% under static (continuous-wave) operation, and high-speed OOK modulation (upto 1Gbps and beyond) is demonstrated with high average efficiency.