Efficient Modeling of PVT Variation for Mixed-Signal Circuit Sizing

Abstract

With the ever-increasing complexity of IC features and properties, manual sizing for mixed -signal circuits lately became very challenging. Recent years brought machine learning and optimization techniques to the field of circuit design, with evolutionary algorithms and Bayesian models showing good results for automated circuit sizing. However, these methods can still require an unfeasible large number of simulations, especially if taking into account several PVT variation corners. In this context, we introduce a methodology that uses surrogate models to perform PVT variation-aware design optimization, that can enhance state-of-the-art evolutionary algorithms. We evaluate the introduced method on one voltage regulator and we highlight that the proposed PVT corner enhancement leads to obtaining feasible solutions up to 2 times faster than using previous state-of-the-art PVT corner representation.