Effect of VLSI interconnect layout on electromigration performance

E.M. Atakov, T. Sriram, D. Dunnell, S. Pizzanello
{"title":"Effect of VLSI interconnect layout on electromigration performance","authors":"E.M. Atakov, T. Sriram, D. Dunnell, S. Pizzanello","doi":"10.1109/RELPHY.1998.670668","DOIUrl":null,"url":null,"abstract":"We characterized the reliability of multiple-via contacts, as well as the impact of the contact current direction on the failure statistics and short-length effects in Ti-Al(Cu)-Ti-TiN lines. A significant difference between the sheet resistances of the top and bottom shunting layers results in a bimodal failure time distribution for the downward electron flow direction. It also causes a significant difference in the short-length resistance saturation for the two current directions.","PeriodicalId":196556,"journal":{"name":"1998 IEEE International Reliability Physics Symposium Proceedings. 36th Annual (Cat. No.98CH36173)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"28","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1998 IEEE International Reliability Physics Symposium Proceedings. 36th Annual (Cat. No.98CH36173)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RELPHY.1998.670668","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 28

Abstract

We characterized the reliability of multiple-via contacts, as well as the impact of the contact current direction on the failure statistics and short-length effects in Ti-Al(Cu)-Ti-TiN lines. A significant difference between the sheet resistances of the top and bottom shunting layers results in a bimodal failure time distribution for the downward electron flow direction. It also causes a significant difference in the short-length resistance saturation for the two current directions.
VLSI互连布局对电迁移性能的影响
我们表征了多通孔触点的可靠性,以及触点电流方向对Ti-Al(Cu)-Ti-TiN线失效统计和短长度效应的影响。顶部和底部分流层的片电阻之间的显著差异导致电子向下流动方向的双峰失效时间分布。这也导致两个电流方向的短长度电阻饱和有显著差异。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信