A Proposal of Analog Correlated Multiple Sampling with High Density Capacitors for Low Noise CMOS Image Sensors

Abstract

In this paper we propose a low power consumption high speed analog correlated multiple sampling (CMS) technique with high density switched capacitors for low noise CMOS image sensors. A CIS with 256 analog memories per pixel using high density trench capacitors was employed in order to verify the noise reduction effect dependent on operation timings. The noise characteristics were measured at sampling numbers of M=1~64 with various CMS sampling period of 10ns to 1µs and time interval between reset and signal samplings, thanks to the high flexibility owing to the proposed analog CMS technique. The measurement results agree well with the theoretical calculation results, showing that conducting CMS with highly correlated signals is effective in noise reduction.