Design of sequential circuits using single-clocked Energy efficient adiabatic Logic for ultra low power application

M. Chanda, A. S. Chakraborty, S. Nag, Raina Modak
{"title":"Design of sequential circuits using single-clocked Energy efficient adiabatic Logic for ultra low power application","authors":"M. Chanda, A. S. Chakraborty, S. Nag, Raina Modak","doi":"10.1109/ISVDAT.2014.6881076","DOIUrl":null,"url":null,"abstract":"This paper presents energy efficient pre-settable adiabatic sequential circuits based on the Energy efficient adiabatic Logic (EEAL). Adiabatic Flip-flops and sequential circuits have been implemented using EEAL style in a TSMC 0.18 μm CMOS technology. Extensive CADENCE simulations show that EEAL based sequential circuit consumes only 22%-35% of total energy consumed by others imperative logic styles.","PeriodicalId":217280,"journal":{"name":"18th International Symposium on VLSI Design and Test","volume":"322 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"18th International Symposium on VLSI Design and Test","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVDAT.2014.6881076","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10

Abstract

This paper presents energy efficient pre-settable adiabatic sequential circuits based on the Energy efficient adiabatic Logic (EEAL). Adiabatic Flip-flops and sequential circuits have been implemented using EEAL style in a TSMC 0.18 μm CMOS technology. Extensive CADENCE simulations show that EEAL based sequential circuit consumes only 22%-35% of total energy consumed by others imperative logic styles.
超低功耗应用中采用单时钟节能绝热逻辑的顺序电路设计
提出了一种基于节能绝热逻辑(EEAL)的节能可调绝热顺序电路。绝热触发器和顺序电路已在TSMC 0.18 μm CMOS技术上采用EEAL方式实现。大量的CADENCE仿真表明,基于EEAL的顺序电路消耗的总能量仅为其他命令式逻辑风格的22%-35%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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