Performance Analysis of Network-on-Chip Topologies for Elbrus Multi-Core Processors

Abstract

Networks-on-chip play important role in modern multi-core processors linking all system components together. Their topologies determine a scalability of bandwidth and memory access time depending on the number of processor cores. In this work networks-on-chip with 2d mesh and 2d torus-mesh topologies for 8-, 12- and 16-core Elbrus processors were studied taking into account constraints of their physical design.