A 65-nm on-chip multi-mode asynchronous local power supply unit for multi-power domain SoCs achieving fine grain DVS

M. Ichihashi, H. Lhermet, E. Beigné, F. Rothan, M. Belleville, A. Amara
{"title":"A 65-nm on-chip multi-mode asynchronous local power supply unit for multi-power domain SoCs achieving fine grain DVS","authors":"M. Ichihashi, H. Lhermet, E. Beigné, F. Rothan, M. Belleville, A. Amara","doi":"10.1109/ASSCC.2009.5357187","DOIUrl":null,"url":null,"abstract":"This paper discusses a local power supply unit designed for fine grain dynamic voltage scaling (DVS) in a multi-power domain SoC. The proposed power supply unit is fully compatible with an I/O library and adaptable to various logic module power needs. It delivers the module operating voltage, from 1.2 V to 0.6 V, according to predefined operating power modes and is equipped with the module power gating. The designed circuit requires five-I/O-pad pitch area in a 65-nm technology. The first test chip demonstrates that the maximum power efficiency is over 87% and the measured current consumption in stand-by mode is only 19 nA regardless of the connected module.","PeriodicalId":263023,"journal":{"name":"2009 IEEE Asian Solid-State Circuits Conference","volume":"428 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2009.5357187","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

This paper discusses a local power supply unit designed for fine grain dynamic voltage scaling (DVS) in a multi-power domain SoC. The proposed power supply unit is fully compatible with an I/O library and adaptable to various logic module power needs. It delivers the module operating voltage, from 1.2 V to 0.6 V, according to predefined operating power modes and is equipped with the module power gating. The designed circuit requires five-I/O-pad pitch area in a 65-nm technology. The first test chip demonstrates that the maximum power efficiency is over 87% and the measured current consumption in stand-by mode is only 19 nA regardless of the connected module.
一种65nm片上多模异步本地电源单元,用于实现细粒度分布式交换机的多功率域soc
本文讨论了多功率域SoC中用于细粒度动态电压缩放(DVS)的局部电源单元。所提出的电源单元与I/O库完全兼容,并适应各种逻辑模块的电源需求。它提供模块的工作电压,从1.2 V到0.6 V,根据预定义的工作功率模式,并配备模块电源门控。所设计的电路在65纳米技术中需要5个i / o衬垫间距。第一个测试芯片表明,最大功率效率超过87%,待机模式下的测量电流消耗仅为19 nA,而与连接的模块无关。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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