Design of an improved bandgap reference in 180nm CMOS process technology

Abstract

This paper grants implementation and design of Bandgap reference circuit with 0.2ppm/ low temperature coefficient in 180nm CMOS process technology. The designed circuit achieves a simulated output voltage reference of 1.12V at room temperature (27°C) with the temperature range of −40°C to +125°C under supply voltage of 1.8V. The power consumption is 52.37uW at room temperature and active area is 81.4um∗63.43um. The designed circuit was implemented using Cadence Virtuoso and simulated using Spectre ADE.