Graphical Model Transformation Analysis for Cognitive Computing and Machine Learning on the SpiNNaker Chip Multiprocessor

Abstract

The SpiNNaker is a parallel neuromorphic hardware architecture that enables a wide variety of computations to be performed in a distributed, event-based manner. The authors have previously shown large speedups for performing MCMC inference using spiking neurons on the SpiNNaker as well as the Parallella, an open-source parallel computing device. Both architectures provide platforms for performing innovative low-power computations, and there are other massively parallel chip multiprocessor platforms arriving in the future. This paper explores a complexity analysis for the algorithms in the automated framework developed to take a binary Bayesian network the whole way from reading in its text file description and transforming the network for parallel MCMC sampling to performing sampling on the SpiNNaker. Although it is focused on the SpiNNaker, many of these principles apply when using other neuromorphic chip multiprocessors, as this algorithmic flow has already been used with the Parallella after some modifications.