Optimal signature placement for processor-error detection using signature monitoring

Abstract

An approach that produces optimal placement of justifying signatures for concurrent processor-error detection using signature monitoring is presented. In this approach, placing justifying signatures on nodes and arcs in a directed program control-flow graph is transformed into placing justifying signatures on edges in an undirected, costed graph. A justifying signature is represented in the costed graph by a deleted edge, and optimal placement is reduced to finding a valid minimum-cost deleted edge set. An equivalent problem is finding this set's maximum-cost complement. For order-independent signature functions, the complement set for optimal placement is shown to be a maximum spanning tree. For cyclic codes, the complement set for optimal placement is a new type of graph, a maximum valuation graph (MVG), which is produced by a new algorithm. Using this algorithm, cyclic codes produce significantly less performance overhead than order-independent functions. Experimental results show that the MVG algorithm yields substantial improvement over previous solutions.<>