{"title":"Real-Time Simulation of Permanent Magnet Motor Drive on FPGA Chip for High-Bandwidth Controller Tests and Validation","authors":"C. Dufour, S. Abourida, J. Bélanger","doi":"10.1109/IECON.2006.347676","DOIUrl":null,"url":null,"abstract":"This paper presents a real-time simulator of a permanent magnet synchronous motor (PMSM) drive implemented on an FPGA card. Real-time simulation of PMSM drives enables rapid deployment and thorough testing of efficient control strategies for vehicular or industrial applications. The PMSM model is based on Park transform with a reference frame on the rotor and assumes sinusoidal flux induction. The PMSM machine in driven by a 3-phase IGBT inverter. Both models are implemented in RT-LAB using a Simulink blockset called Xilinx System Generator (XSG), without any VHDL coding. The paper explains various aspects of the design of the motor drive models in fixed-point representation in XSG, as well as actual simulation validations against a standard PMSM drive model built in Simulink. The PMSM drive is coded along with a test PWM source, built-in the FPGA, with user selectable dead-time, modulation index, source angle offset and frequency. The overall model compilation and simulation is made entirely automatic under the RT-LAB real-time simulation platform. The drive can also run in closed loop with a controller executed on a CPU of the real-time simulator. The final PMSM drive model runs with a 20 ns integration time step, allows for time multiplexing of d-q values and has an input-output latency of 310 ns (250 ns for the PMSM machine alone). The drive is directly connected to RT-LAB digital input and analog outputs (1 microsecond settling time) on the FPGA card and has a resulting total HIL latency of 1.31 microseconds","PeriodicalId":296467,"journal":{"name":"2006 IEEE International Symposium on Industrial Electronics","volume":"379 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"27","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International Symposium on Industrial Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IECON.2006.347676","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 27
Abstract
This paper presents a real-time simulator of a permanent magnet synchronous motor (PMSM) drive implemented on an FPGA card. Real-time simulation of PMSM drives enables rapid deployment and thorough testing of efficient control strategies for vehicular or industrial applications. The PMSM model is based on Park transform with a reference frame on the rotor and assumes sinusoidal flux induction. The PMSM machine in driven by a 3-phase IGBT inverter. Both models are implemented in RT-LAB using a Simulink blockset called Xilinx System Generator (XSG), without any VHDL coding. The paper explains various aspects of the design of the motor drive models in fixed-point representation in XSG, as well as actual simulation validations against a standard PMSM drive model built in Simulink. The PMSM drive is coded along with a test PWM source, built-in the FPGA, with user selectable dead-time, modulation index, source angle offset and frequency. The overall model compilation and simulation is made entirely automatic under the RT-LAB real-time simulation platform. The drive can also run in closed loop with a controller executed on a CPU of the real-time simulator. The final PMSM drive model runs with a 20 ns integration time step, allows for time multiplexing of d-q values and has an input-output latency of 310 ns (250 ns for the PMSM machine alone). The drive is directly connected to RT-LAB digital input and analog outputs (1 microsecond settling time) on the FPGA card and has a resulting total HIL latency of 1.31 microseconds