A three-level space vector modulation scheme for paralleled two converters to reduce zero-sequence circulating current and common mode voltage

Abstract

Circulating current has been the major concern for the implementing of paralleled converters. This paper proposes a three-level space vector modulation (SVM) scheme for the system constructed by two paralleled voltage source converters (VSCs) and common mode inductor (CMI). The proposed scheme aims to reduce the zero-sequence circulating current (ZSCC) and the magnitude of common mode voltage (CMV) of the system. The ZSCC pattern with respect to modulation schemes are first analyzed to provide a clear understanding of the generation of ZSCC. And then the proposed scheme is introduced. Analysis regarding the ZSCC peak value, impact on the common mode current (CMC), and switching losses are made and compared with the existing methods. The proposed method has been verified in simulation and experiment.