{"title":"Very Wide Range Frequency Synthesizer Architecture for Avionic SDR Applications","authors":"Z. A. A. Ismaili, W. Ajib, F. Gagnon, F. Nabki","doi":"10.1109/ICUWB.2015.7324527","DOIUrl":null,"url":null,"abstract":"This paper presents a very wide range frequency synthesizer architecture appropriate to avionic software defined radio (SDR) applications. The synthesizer generates a continuous carrier frequencies range between 187 MHz and 12.2 GHz that covers most of avionic communication applications. The covered range is distributed into twenty sub- bands by using a voltage controlled oscillator (VCO). The considered VCO is able to achieve a tuning range from 10 GHz to 12 GHz (18.2%) and from 7 GHz to 8.5 GHz (19.35%). It includes a capacitor bank, varactors, and switched inductors and is designed in 0.13 μm CMOS technology. Using the advanced design system (ADS) simulation tool and SpectreRF simulator, the proposed VCO exhibits a phase noise of -125 dBc/Hz at 12 GHz and at a 10 MHz offset frequency with a power consumption of 4.1 mW. At 10 GHz, the simulated synthesizer phase noise is of -102 dBc/Hz at a 1 MHz frequency offset. In addition, the loop bandwidth of the phase locked loop (PLL) is 1.1 MHz whereas the settling time is 3.64 μs.","PeriodicalId":339208,"journal":{"name":"2015 IEEE International Conference on Ubiquitous Wireless Broadband (ICUWB)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE International Conference on Ubiquitous Wireless Broadband (ICUWB)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICUWB.2015.7324527","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
This paper presents a very wide range frequency synthesizer architecture appropriate to avionic software defined radio (SDR) applications. The synthesizer generates a continuous carrier frequencies range between 187 MHz and 12.2 GHz that covers most of avionic communication applications. The covered range is distributed into twenty sub- bands by using a voltage controlled oscillator (VCO). The considered VCO is able to achieve a tuning range from 10 GHz to 12 GHz (18.2%) and from 7 GHz to 8.5 GHz (19.35%). It includes a capacitor bank, varactors, and switched inductors and is designed in 0.13 μm CMOS technology. Using the advanced design system (ADS) simulation tool and SpectreRF simulator, the proposed VCO exhibits a phase noise of -125 dBc/Hz at 12 GHz and at a 10 MHz offset frequency with a power consumption of 4.1 mW. At 10 GHz, the simulated synthesizer phase noise is of -102 dBc/Hz at a 1 MHz frequency offset. In addition, the loop bandwidth of the phase locked loop (PLL) is 1.1 MHz whereas the settling time is 3.64 μs.