{"title":"PAIG Rewriting: The Way to Scalable Multifunctional Digital Circuits Synthesis","authors":"Adam Crha, Václav Simek, R. Ruzicka","doi":"10.1109/DSD.2019.00056","DOIUrl":null,"url":null,"abstract":"Main objective of this paper is to introduce a novel methodology for scalable synthesis of multifunctional (polymorphic) digital circuits. Despite the fact that several approaches have been proposed during recent years, those are applicable for small-scale circuits only or based on various evolution-inspired techniques. Obvious, there does not exist yet scalable synthesis methodology for complex multifunctional circuits. The proposed methodology is based on And-Inverter Graphs (AIGs) with built-in extension for multifunctional circuits where the employment of rewriting techniques reduces the area by sharing common resources of two different input circuits. Experiments performed on publicly available benchmark circuits demonstrate significant area reduction.","PeriodicalId":217233,"journal":{"name":"2019 22nd Euromicro Conference on Digital System Design (DSD)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 22nd Euromicro Conference on Digital System Design (DSD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DSD.2019.00056","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
Main objective of this paper is to introduce a novel methodology for scalable synthesis of multifunctional (polymorphic) digital circuits. Despite the fact that several approaches have been proposed during recent years, those are applicable for small-scale circuits only or based on various evolution-inspired techniques. Obvious, there does not exist yet scalable synthesis methodology for complex multifunctional circuits. The proposed methodology is based on And-Inverter Graphs (AIGs) with built-in extension for multifunctional circuits where the employment of rewriting techniques reduces the area by sharing common resources of two different input circuits. Experiments performed on publicly available benchmark circuits demonstrate significant area reduction.