P. Hart, J. van Staveren, F. Sebastiano, Jianjun Xu, D. Root, M. Babaie
{"title":"Artificial Neural Network Modelling for Cryo-CMOS Devices","authors":"P. Hart, J. van Staveren, F. Sebastiano, Jianjun Xu, D. Root, M. Babaie","doi":"10.1109/WOLTE49037.2021.9555438","DOIUrl":null,"url":null,"abstract":"Quantum-based systems, such as quantum computers and quantum sensors, typically require a cryogenic electrical interface, which can be conveniently implemented using CMOS integrated circuits operating at cryogenic temperatures (cryo-CMOS). Reliable simulation models are required to design complex circuits, but CMOS transistor electrical characteristics at cryogenic temperatures substantially deviate from the behavior at room temperature, and no standard physics-based model exists for cryo-CMOS devices. To circumvent those limitations, this paper proposes the use of Artificial Neural Networks (ANN) and an associated training (extraction) procedure that automatically generates cryo-CMOS device models directly from experimental data. A device model for the DC characteristics of 40-nm CMOS transistors over a wide range of bias conditions, device geometries and temperatures from 4 K to 300 K has been generated and used to simulate voltage-reference circuits over a wide temperature range (4 K – 300 K). The potential application to dynamic/high-frequency circuits is demonstrated by enhancing the basic model with ANN-based nonlinear multi-terminal capacitive elements to simulate a ring oscillator. Preliminary results showing a good match between simulations and experiments demonstrate the feasibility and practicality of the proposed approach.","PeriodicalId":201501,"journal":{"name":"2021 IEEE 14th Workshop on Low Temperature Electronics (WOLTE)","volume":"101 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-04-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE 14th Workshop on Low Temperature Electronics (WOLTE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WOLTE49037.2021.9555438","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Quantum-based systems, such as quantum computers and quantum sensors, typically require a cryogenic electrical interface, which can be conveniently implemented using CMOS integrated circuits operating at cryogenic temperatures (cryo-CMOS). Reliable simulation models are required to design complex circuits, but CMOS transistor electrical characteristics at cryogenic temperatures substantially deviate from the behavior at room temperature, and no standard physics-based model exists for cryo-CMOS devices. To circumvent those limitations, this paper proposes the use of Artificial Neural Networks (ANN) and an associated training (extraction) procedure that automatically generates cryo-CMOS device models directly from experimental data. A device model for the DC characteristics of 40-nm CMOS transistors over a wide range of bias conditions, device geometries and temperatures from 4 K to 300 K has been generated and used to simulate voltage-reference circuits over a wide temperature range (4 K – 300 K). The potential application to dynamic/high-frequency circuits is demonstrated by enhancing the basic model with ANN-based nonlinear multi-terminal capacitive elements to simulate a ring oscillator. Preliminary results showing a good match between simulations and experiments demonstrate the feasibility and practicality of the proposed approach.