{"title":"A New Transformerless Photovoltaic Inverter with Common Mode Leakage Current Elimination","authors":"V. M. Fiori, Lucas R. Brigo, I. Barbi","doi":"10.1109/INDUSCON.2018.8627291","DOIUrl":null,"url":null,"abstract":"This paper presents a new transformerless photovoltaic inverter to be connected to the grid which consists basically on four power transistors and a main inductor. The study was performed using a continuous voltage source and a resistive load with capacitive filter at the inverter output. The topology is designed to suppress the potential difference between: the negative pole of the photovoltaic module; the common node (reference zero) of the inverter circuit; and the output terminal connected to the neutral of the electrical grid. This prevents leakage current through the parasitic capacitor of the photovoltaic modules, caused by high frequency common mode voltage, originated from the switching process. The steady state equations for the new inverter were developed and validated.","PeriodicalId":156866,"journal":{"name":"2018 13th IEEE International Conference on Industry Applications (INDUSCON)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 13th IEEE International Conference on Industry Applications (INDUSCON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INDUSCON.2018.8627291","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents a new transformerless photovoltaic inverter to be connected to the grid which consists basically on four power transistors and a main inductor. The study was performed using a continuous voltage source and a resistive load with capacitive filter at the inverter output. The topology is designed to suppress the potential difference between: the negative pole of the photovoltaic module; the common node (reference zero) of the inverter circuit; and the output terminal connected to the neutral of the electrical grid. This prevents leakage current through the parasitic capacitor of the photovoltaic modules, caused by high frequency common mode voltage, originated from the switching process. The steady state equations for the new inverter were developed and validated.