Hardware Description of Event-driven Systems by Translation of UML Statecharts to VHDL

Cristinel Ababei, S. Schneider
{"title":"Hardware Description of Event-driven Systems by Translation of UML Statecharts to VHDL","authors":"Cristinel Ababei, S. Schneider","doi":"10.1109/eIT57321.2023.10187218","DOIUrl":null,"url":null,"abstract":"We present a complete implementation prototype of the classic Fly-n-Shoot game on an FPGA. This is a famous game that has been described in the past using UML statecharts as an event-driven embedded system. Because it has a rather complex functionality, attempting to describe it using a hardware description language (HDL), such as VHDL or Verilog, with the goal of deploying on a real FPGA becomes challenging. As such, brute-force attempts to write HDL descriptions are prone to errors and subject to long design times. Hence, in this paper, we describe a practical approach for translating UML statecharts used to specify event-driven embedded systems into VHDL code written using the popular two-process coding style. This approach consists of a set of mapping rules from statecharts concepts into VHDL constructs. The efficacy and correct by design characteristics of the presented approach are due to the use of two-process VHDL coding to describe the hierarchical finite state machine (FSM) corresponding to the UML statecharts. This gives the designer better control over the current and next state signals of the FSMs, it is more modular or object oriented, and makes development and debugging much easier. We apply the proposed approach to implement a prototype of the classic Fly-n-Shoot game. The implementation is verified successfully on real hardware, the DE1-SoC FPGA development board, that uses a Cyclone IV FPGA chip.","PeriodicalId":113717,"journal":{"name":"2023 IEEE International Conference on Electro Information Technology (eIT)","volume":"62 5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE International Conference on Electro Information Technology (eIT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/eIT57321.2023.10187218","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

We present a complete implementation prototype of the classic Fly-n-Shoot game on an FPGA. This is a famous game that has been described in the past using UML statecharts as an event-driven embedded system. Because it has a rather complex functionality, attempting to describe it using a hardware description language (HDL), such as VHDL or Verilog, with the goal of deploying on a real FPGA becomes challenging. As such, brute-force attempts to write HDL descriptions are prone to errors and subject to long design times. Hence, in this paper, we describe a practical approach for translating UML statecharts used to specify event-driven embedded systems into VHDL code written using the popular two-process coding style. This approach consists of a set of mapping rules from statecharts concepts into VHDL constructs. The efficacy and correct by design characteristics of the presented approach are due to the use of two-process VHDL coding to describe the hierarchical finite state machine (FSM) corresponding to the UML statecharts. This gives the designer better control over the current and next state signals of the FSMs, it is more modular or object oriented, and makes development and debugging much easier. We apply the proposed approach to implement a prototype of the classic Fly-n-Shoot game. The implementation is verified successfully on real hardware, the DE1-SoC FPGA development board, that uses a Cyclone IV FPGA chip.
用UML状态图转换成VHDL实现事件驱动系统的硬件描述
我们提出了一个完整的实现原型的经典的飞-n-射击游戏在FPGA上。这是一个著名的游戏,在过去使用UML状态图作为事件驱动的嵌入式系统来描述它。由于它具有相当复杂的功能,因此尝试使用硬件描述语言(HDL)(如VHDL或Verilog)来描述它,并将其部署在真正的FPGA上变得具有挑战性。因此,强行编写HDL描述的尝试很容易出错,并且需要很长的设计时间。因此,在本文中,我们描述了一种将用于指定事件驱动嵌入式系统的UML状态图转换为使用流行的双进程编码风格编写的VHDL代码的实用方法。这种方法由一组从状态图概念到VHDL构造的映射规则组成。由于采用两进程VHDL编码来描述与UML状态图相对应的分层有限状态机(FSM),该方法的有效性和设计特性是正确的。这使设计人员能够更好地控制fsm的当前和下一个状态信号,它更加模块化或面向对象,并且使开发和调试更加容易。我们将提出的方法用于实现经典的Fly-n-Shoot游戏的原型。在实际硬件上,使用Cyclone IV FPGA芯片的DE1-SoC FPGA开发板上成功地验证了该实现。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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