{"title":"Innovative stack-die package - S2BGA","authors":"L. Wu, Y. Wang, C. Hsiao","doi":"10.1109/ECTC.2002.1008102","DOIUrl":null,"url":null,"abstract":"The stack-die package concept emerged 2/spl sim/3 years ago. The major product a stack-die package with flash and SRAM chips integrated together, used in cellular phones for the purpose of size and weight reduction. The basic requirement for these two dies in a stacked package is that the size difference must be large enough to allow a wire bonding process at the bottom die, if we still want to utilize the low cost, mature wire bonding technology in interconnections. However, this requirement will limit the application in trying to integrate two similar or same sized dies into a single stack-die package. One solution for this application is to utilize flip chip technology in the interconnection, to solve the die size difference requirement. One of the concerns for this package is the higher assembly cost due to flip chip interconnection. Therefore, a low cost, high reliability alternative package structure is created, it is named S2BGA (spacer stacked ball grid array). In this package, a silicon spacer is deposited between top and bottom dies to offer enough space for the wire bonding process. Since mature wire bonding technology is still utilized, a reliable and cost effective stack-die package is provided but maintains the same package size.","PeriodicalId":285713,"journal":{"name":"52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345)","volume":"241 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2002.1008102","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
The stack-die package concept emerged 2/spl sim/3 years ago. The major product a stack-die package with flash and SRAM chips integrated together, used in cellular phones for the purpose of size and weight reduction. The basic requirement for these two dies in a stacked package is that the size difference must be large enough to allow a wire bonding process at the bottom die, if we still want to utilize the low cost, mature wire bonding technology in interconnections. However, this requirement will limit the application in trying to integrate two similar or same sized dies into a single stack-die package. One solution for this application is to utilize flip chip technology in the interconnection, to solve the die size difference requirement. One of the concerns for this package is the higher assembly cost due to flip chip interconnection. Therefore, a low cost, high reliability alternative package structure is created, it is named S2BGA (spacer stacked ball grid array). In this package, a silicon spacer is deposited between top and bottom dies to offer enough space for the wire bonding process. Since mature wire bonding technology is still utilized, a reliable and cost effective stack-die package is provided but maintains the same package size.