S. Akhtar, G. Schuppener, T. Dinc, B. Haroun, S. Sankaran
{"title":"DC to 12+GHz, +30dBm OIP3, 7.2dB Noise Figure Active Balun in 130nm BiCMOS for RF Sampling Multi-Gbps Data Converters","authors":"S. Akhtar, G. Schuppener, T. Dinc, B. Haroun, S. Sankaran","doi":"10.1109/RFIC54546.2022.9863207","DOIUrl":null,"url":null,"abstract":"An active balun using dual stage feedback and distributed feedforward distortion cancellation for use as a driver amplifier for wideband RF sampling ADCs is presented. With a gain of 16.5dB & HD2 of 60dBc while delivering 3dBm (100Ω), the DC coupled balun achieves a linear-bandwidth of >12GHz holding OIP3>27dBm & NF<8dB, and small-signal bandwidth of 18GHz with <±0.5dB amplitude & <±2.5° phase imbalance. Cascaded balun + ADC measurements demonstrate no linearity limitation, while allowing for 19.5dB lower input signal. Occupying 1mm2in a 130nm BiCMOS process, the device consumes 100mA from 5V in a 2×2mm2 flip chip QFN package.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"266 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC54546.2022.9863207","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
An active balun using dual stage feedback and distributed feedforward distortion cancellation for use as a driver amplifier for wideband RF sampling ADCs is presented. With a gain of 16.5dB & HD2 of 60dBc while delivering 3dBm (100Ω), the DC coupled balun achieves a linear-bandwidth of >12GHz holding OIP3>27dBm & NF<8dB, and small-signal bandwidth of 18GHz with <±0.5dB amplitude & <±2.5° phase imbalance. Cascaded balun + ADC measurements demonstrate no linearity limitation, while allowing for 19.5dB lower input signal. Occupying 1mm2in a 130nm BiCMOS process, the device consumes 100mA from 5V in a 2×2mm2 flip chip QFN package.