Extending the Open-Short de-embedding frequency via metal-l on-wafer calibration approaches

C. Esposito, C. De Martino, S. Lehmann, Z. Zhao, S. Mothes, C. Kretzschmar, M. Schröter, M. Spirito
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引用次数: 1

Abstract

In this contribution, We analyze the bandwidth versus accuracy trade-offs of conventional two-step de-embedding approaches, often employed to extract the device model parameters. The accuracy limitation of incorporating the pad/line section of classical DUT test-fixtures into shunt-series complex and frequency-dependent elements is analyzed by means of linear circuit simulations and EM parametric analysis. The de-embedding accuracy is then evaluated by employing 3D surfaces to include both the frequency and the geometrical dependency. To validate the presented analysis, classical device monitoring parameters are extracted versus frequency for the same nMOS device embedded in two different fixtures. One topology only supports pad level calibration, thus including the fixture pad/line section in the de-embedding process. The second topology allows a direct on-Wafer calibration (reference plane set on metal-1 in close proximity to the DUT) thus minimizing the residual parasitics to be removed by the de-embedding step. Experimental data are then presented and compared to simulation test benches to highlight the improved consistency of the extracted model parameters of the metal-1 calibration approach up to 220GHz.
通过金属-晶圆校准方法扩展开-短去埋频率
在这篇贡献中,我们分析了通常用于提取器件模型参数的传统两步去嵌入方法的带宽与精度权衡。通过线性电路仿真和电磁参数分析,分析了传统被测夹具的焊盘/线段与并联串联复频元件结合的精度限制。然后通过使用3D曲面来评估去嵌入精度,包括频率和几何依赖性。为了验证所提出的分析,提取了嵌入在两个不同夹具中的同一nMOS器件的经典器件监测参数与频率的关系。一种拓扑只支持垫级校准,因此在去嵌入过程中包括夹具垫/线部分。第二种拓扑结构允许直接在晶圆上进行校准(参考平面设置在靠近DUT的金属-1上),从而最大限度地减少通过去嵌入步骤去除的残余寄生。最后给出了实验数据,并与仿真试验台进行了比较,以突出金属-1校准方法提取的模型参数在220GHz范围内的一致性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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