{"title":"CMOS Schmitt Trigger Circuit and Oscillator Design: The Impact of NBTI Degradation","authors":"A. Vijay, Chusen Duari, L. Garg, A. Singh","doi":"10.1109/ICCMC56507.2023.10084272","DOIUrl":null,"url":null,"abstract":"CMOS Schmitt trigger is a widely used circuit in numerous applications including those for removing noise from signals, to speed up slow edge signals and in the design of oscillators. Aging related degradation in CMOS circuits is a key concern which limits their performance over longer periods (years). This article examines the performance degradation in a CMOS Schmitt trigger circuit over a period of 10 years under the effect of NBTI degradation. The CMOS Schmitt trigger circuit has been used as an oscillator and its output has been examined Variation in dvth with time in p-MOSFETs of the Schmitt trigger circuit and the oscillator circuit have been evaluated. The transient analysis of the Schmitt trigger shows a notable degradation in circuit performance. At year 0 the falling edge transition takes places at 34.8 ns while at year 10 the falling edge transition takes place at 34.6 ns showing a shift of 0.2 ns.","PeriodicalId":197059,"journal":{"name":"2023 7th International Conference on Computing Methodologies and Communication (ICCMC)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-02-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 7th International Conference on Computing Methodologies and Communication (ICCMC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCMC56507.2023.10084272","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
CMOS Schmitt trigger is a widely used circuit in numerous applications including those for removing noise from signals, to speed up slow edge signals and in the design of oscillators. Aging related degradation in CMOS circuits is a key concern which limits their performance over longer periods (years). This article examines the performance degradation in a CMOS Schmitt trigger circuit over a period of 10 years under the effect of NBTI degradation. The CMOS Schmitt trigger circuit has been used as an oscillator and its output has been examined Variation in dvth with time in p-MOSFETs of the Schmitt trigger circuit and the oscillator circuit have been evaluated. The transient analysis of the Schmitt trigger shows a notable degradation in circuit performance. At year 0 the falling edge transition takes places at 34.8 ns while at year 10 the falling edge transition takes place at 34.6 ns showing a shift of 0.2 ns.