A 10 Gb/s and 40 Gb/s forward-error-correction device for optical communications

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) Pub Date : 2002-08-07 DOI:10.1109/ISSCC.2002.992969

Leilei Song, Meng-Lin Yu, M. Shaffer

引用次数: 7

Abstract

Two forward error-correcting devices for OC-48/192/768 are implemented in 1.5 V 0.6 /spl mu/m CMOS. A 10 Gb/s (or Quad 2.5 Gb/s) device with 424k-gate Reed-Solomon core consumes 343 mW. A 40 Gb/s device contains 364k-gates and consumes 361 mW.

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用于光通信的10gb /s和40gb /s前向纠错装置

OC-48/192/768的两个前向纠错器件在1.5 V 0.6 /spl mu/m CMOS中实现。424k栅极Reed-Solomon核心的10gb /s(或Quad 2.5 Gb/s)设备消耗343 mW。一个40gb /s的设备包含364k门，消耗361兆瓦。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)

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