K. Ishii, H. Nosaka, H. Nakajima, K. Kurishima, M. Ida, N. Watanabe, Y. Yamane, E. Sano, T. Enoki
{"title":"1-W 1:16 DEMUX and one-chip CDR with 1:4 DEMUX for 10 Gbit/s optical communication systems","authors":"K. Ishii, H. Nosaka, H. Nakajima, K. Kurishima, M. Ida, N. Watanabe, Y. Yamane, E. Sano, T. Enoki","doi":"10.1109/GAAS.2001.964356","DOIUrl":null,"url":null,"abstract":"Using InP/InGaAs heterojunction bipolar transistor (HBT) technology, we have successfully designed and fabricated a low power 1:16 demultiplexer (DEMUX) IC and one-chip clock and data recovery (CDR) with a 1:4 DEMUX IC for 10 Gbit/s optical communication systems. The HBTs were fabricated by a non-self-aligned process to achieve high productivity and uniformity of device characteristics. The 1:16 DEMUX IC and the one-chip CDR with the 1:4 DEMUX IC consist of approximately 1200 and 460 transistors, respectively. We have confirmed error-free operation at 10 Gbit/s for all data outputs of both ICs. The 1:16 DEMUX IC and the one-chip CDR with the 1:4 DEMUX IC consume only 1 W and 950 mW, respectively. These results demonstrate the feasibility of InP/InGaAs HBTs for low-power, high-integration optical communication ICs.","PeriodicalId":269944,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 23rd Annual Technical Digest 2001 (Cat. No.01CH37191)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2001-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 23rd Annual Technical Digest 2001 (Cat. No.01CH37191)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GAAS.2001.964356","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Using InP/InGaAs heterojunction bipolar transistor (HBT) technology, we have successfully designed and fabricated a low power 1:16 demultiplexer (DEMUX) IC and one-chip clock and data recovery (CDR) with a 1:4 DEMUX IC for 10 Gbit/s optical communication systems. The HBTs were fabricated by a non-self-aligned process to achieve high productivity and uniformity of device characteristics. The 1:16 DEMUX IC and the one-chip CDR with the 1:4 DEMUX IC consist of approximately 1200 and 460 transistors, respectively. We have confirmed error-free operation at 10 Gbit/s for all data outputs of both ICs. The 1:16 DEMUX IC and the one-chip CDR with the 1:4 DEMUX IC consume only 1 W and 950 mW, respectively. These results demonstrate the feasibility of InP/InGaAs HBTs for low-power, high-integration optical communication ICs.