Reconfigurable ALU optimization

Abstract

The RALU optimisation research targeted to develop a soft processor, which is capable of a dynamic optimization of resource utilisation and increased processor throughput by changing its structure according to the running instruction. The RALU shows higher instruction gain and clock cycle gain compared to 8 bit microprocessor in similar scale. So the RALU approach provides solution to higher resource critical FPGA based design by improving the resource utilisation and providing higher processor throughput.