{"title":"Very fast transient voltage regulators based on load correction","authors":"F. Poon, C. Tse, Joe C. P. Liu","doi":"10.1109/PESC.1999.788982","DOIUrl":null,"url":null,"abstract":"The requirement of output current of very high slew rate has presented a great challenge to the design of voltage regulator modules that deliver power to computer CPUs such as the Pentium Pro. Methods for enhancing transient speed have been evolved around the reduction of effective inductance of the switching regulator through interleaving and paralleling converters. This paper introduces the concept of \"phantom load\" for achieving very fast and tight output voltage regulation for any switching converter. Essentially a special load corrector circuit is attached to the output of the switching regulator. This load corrector combines with the actual load (e.g., CPU chip) to form a slowly varying composite load or \"phantom load\" which permits the switching regulator to maintain a well regulated output voltage even when the actual load is changing very rapidly. This paper discusses the conceptual construction of the load corrector and its practical implementations. Experimental tests (based on available IC and discrete components) for a 20 A step load showing an output voltage fluctuation of less than /spl plusmn/30 mV are presented.","PeriodicalId":292317,"journal":{"name":"30th Annual IEEE Power Electronics Specialists Conference. Record. (Cat. No.99CH36321)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"42","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"30th Annual IEEE Power Electronics Specialists Conference. Record. (Cat. No.99CH36321)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PESC.1999.788982","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 42
Abstract
The requirement of output current of very high slew rate has presented a great challenge to the design of voltage regulator modules that deliver power to computer CPUs such as the Pentium Pro. Methods for enhancing transient speed have been evolved around the reduction of effective inductance of the switching regulator through interleaving and paralleling converters. This paper introduces the concept of "phantom load" for achieving very fast and tight output voltage regulation for any switching converter. Essentially a special load corrector circuit is attached to the output of the switching regulator. This load corrector combines with the actual load (e.g., CPU chip) to form a slowly varying composite load or "phantom load" which permits the switching regulator to maintain a well regulated output voltage even when the actual load is changing very rapidly. This paper discusses the conceptual construction of the load corrector and its practical implementations. Experimental tests (based on available IC and discrete components) for a 20 A step load showing an output voltage fluctuation of less than /spl plusmn/30 mV are presented.