{"title":"A 3-stage recursive Weaver image-reject receiver","authors":"R. Srinivasan, Wei-Gi Ho, R. Gharpurey","doi":"10.1109/RFIC.2016.7508259","DOIUrl":null,"url":null,"abstract":"A low-power Weaver image-reject receiver based on 3rd-order signal recursion is demonstrated. The design employs two downconverters and seeks to enhance the dynamic range and gain-bandwidth product per unit power dissipation metric by adopting recursive gain reuse at multiple frequencies. Utilizing an LO at frequency fLO, the downconverter recursively amplifies an RF signal at fRF at 3 distinct frequencies, namely fRF, fRF - fLO and fRF - 2fLO, while using the same DC bias current. Further, the receiver uses the same quadrature mixers to perform the two frequency translations. The design is implemented in a 130 nm CMOS process. Over a current range from 650 μA to 2 mA, employing a supply voltage of 1.2V, the design achieves a corresponding conversion gain in the range from 57.2-82.7 dB, flicker noise corner <; 20 kHz, and a SSBNF of 13.6-6.8 dB for fRF = 404/434 MHz, in each downconverter. The architecture is suitable for application in a low-IF MICS/ISM band receiver, and low-power sensor applications.","PeriodicalId":163595,"journal":{"name":"2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2016.7508259","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A low-power Weaver image-reject receiver based on 3rd-order signal recursion is demonstrated. The design employs two downconverters and seeks to enhance the dynamic range and gain-bandwidth product per unit power dissipation metric by adopting recursive gain reuse at multiple frequencies. Utilizing an LO at frequency fLO, the downconverter recursively amplifies an RF signal at fRF at 3 distinct frequencies, namely fRF, fRF - fLO and fRF - 2fLO, while using the same DC bias current. Further, the receiver uses the same quadrature mixers to perform the two frequency translations. The design is implemented in a 130 nm CMOS process. Over a current range from 650 μA to 2 mA, employing a supply voltage of 1.2V, the design achieves a corresponding conversion gain in the range from 57.2-82.7 dB, flicker noise corner <; 20 kHz, and a SSBNF of 13.6-6.8 dB for fRF = 404/434 MHz, in each downconverter. The architecture is suitable for application in a low-IF MICS/ISM band receiver, and low-power sensor applications.