An Improvement of the Matrix-Matrix Multiplication Speed using 2D-Tiling and AVX512 Intrinsics for Multi-Core Architectures

Nwe Zin Oo, P. Chaikan
{"title":"An Improvement of the Matrix-Matrix Multiplication Speed using 2D-Tiling and AVX512 Intrinsics for Multi-Core Architectures","authors":"Nwe Zin Oo, P. Chaikan","doi":"10.55164/ajstr.v24i2.242021","DOIUrl":null,"url":null,"abstract":"Matrix-matrix multiplication is a time-consuming operation in scientific and engineering applications. When the matrix size is large, it will take a lot of computation time, resulting in slow software which is unacceptable in real-time applications. In this paper, 2D-tiling, loop unrolling, data padding, OpenMP directives, and AVX512 intrinsics are utilized to increase the speed of matrix-matrix multiplication on multi-core architectures. Our algorithm, tested on a Core i9-7900X machine, is more than two times faster than the operations offered by the OpenBLAS and Eigen libraries for single and double precision floating-point matrices. We also propose an equation for parameter tuning which allows our algorithm to be adapted to process any size of matrix on CPUs with different cache organizations.","PeriodicalId":426475,"journal":{"name":"ASEAN Journal of Scientific and Technological Reports","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-08-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ASEAN Journal of Scientific and Technological Reports","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.55164/ajstr.v24i2.242021","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

Matrix-matrix multiplication is a time-consuming operation in scientific and engineering applications. When the matrix size is large, it will take a lot of computation time, resulting in slow software which is unacceptable in real-time applications. In this paper, 2D-tiling, loop unrolling, data padding, OpenMP directives, and AVX512 intrinsics are utilized to increase the speed of matrix-matrix multiplication on multi-core architectures. Our algorithm, tested on a Core i9-7900X machine, is more than two times faster than the operations offered by the OpenBLAS and Eigen libraries for single and double precision floating-point matrices. We also propose an equation for parameter tuning which allows our algorithm to be adapted to process any size of matrix on CPUs with different cache organizations.
基于二维平铺和AVX512特性的矩阵-矩阵乘法速度的改进
矩阵-矩阵乘法在科学和工程应用中是一个耗时的运算。当矩阵大小较大时,会占用大量的计算时间,导致软件运行缓慢,这在实时应用中是不可接受的。本文利用二维平铺、循环展开、数据填充、OpenMP指令和AVX512特性来提高多核架构上矩阵-矩阵乘法的速度。我们的算法在酷睿i9-7900X机器上进行了测试,它比OpenBLAS和Eigen库提供的单精度和双精度浮点矩阵的操作快两倍以上。我们还提出了一个参数调优方程,该方程允许我们的算法适应在具有不同缓存组织的cpu上处理任何大小的矩阵。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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