A monolithic stacked Class-D approach for high voltage DC-AC conversion in standard CMOS

P. Callemeyn, M. Steyaert
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Abstract

A fully-integrated Class-D DC-AC converter is realized in a 130 nm 1.2V CMOS technology with an on-chip inductor and capacitor. Several dies are combined to achieve higher output power. A multilevel topology allows the combined Class-D DC-AC system to achieve higher output voltages at a multiple of the nominal supply voltage of 1.2V. Problems such as hot carrier degradation and oxide breakdown are absent, since each subblock operates within the standard voltage limits. An off-chip low frequency signal can be used as a reference clock for the Class-D DC-AC converter using an on-chip PWM generation circuit. For this monolithic multilevel system, no discrete components are needed anymore, reducing the bill of materials. A maximum efficiency of 66.5% for a stand-alone die is reached. An output peak voltage of 2.4V peak-to-peak is achieved at an efficiency of 33% by using a combination of several dies. A total output power of 95mW is obtained.
标准CMOS中用于高压DC-AC转换的单片堆叠d类方法
完全集成的d类DC-AC转换器采用130 nm 1.2V CMOS技术实现,带有片上电感和电容器。多个模具组合,实现更高的输出功率。多电平拓扑结构允许组合的d类DC-AC系统在1.2V标称电源电压的倍数下实现更高的输出电压。由于每个子块都在标准电压范围内工作,因此不存在热载流子降解和氧化物击穿等问题。片外低频信号可以作为d类DC-AC转换器的参考时钟,使用片内PWM产生电路。对于这种单片多电平系统,不再需要分立元件,减少了材料清单。独立模具的最高效率达到66.5%。通过使用几个芯片的组合,以33%的效率实现了2.4V的峰对峰输出电压。得到的总输出功率为95mW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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