D. Kobayashi, T. Shibata, Y. Fujimori, T. Nakamura, H. Takasu
{"title":"A ferroelectric analog associative memory technology employing hetero-gate floating-gate-MOS structure","authors":"D. Kobayashi, T. Shibata, Y. Fujimori, T. Nakamura, H. Takasu","doi":"10.1109/VLSIT.2002.1015415","DOIUrl":null,"url":null,"abstract":"An analog associative memory technology has been developed using ferroelectric materials as a means of storing template vector information. In order to accommodate the associative memory cell to a wide voltage range of the input signal, a hetero-gate floating-gate-MOS structure has been introduced. The concept has been experimentally verified using fabricated test devices and circuits.","PeriodicalId":103040,"journal":{"name":"2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2002.1015415","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
An analog associative memory technology has been developed using ferroelectric materials as a means of storing template vector information. In order to accommodate the associative memory cell to a wide voltage range of the input signal, a hetero-gate floating-gate-MOS structure has been introduced. The concept has been experimentally verified using fabricated test devices and circuits.