Design SRAMs for burn-in

Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium Pub Date : 1993-04-06 DOI:10.1109/VTEST.1993.313330

W. Reohr, Y. Chan, D. Plass, A. Pelella, P. -. Wu

引用次数: 3

Abstract

SRAM designers and product engineers must balance the diverse aspects involved in developing and manufacturing quality ICs. This paper describes how cost and complexity design techniques to improve burn-in, noting implications for performance, power and density.<>

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设计用于老化的ram

SRAM设计人员和产品工程师必须平衡开发和制造高质量集成电路所涉及的各个方面。本文描述了成本和复杂性设计技术如何改善老化，注意到对性能、功率和密度的影响

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium

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