Fault-tolerant FPGAs by online ECC verification and restoration

Abstract

In this paper, an new approach is introduced for FPGAs to perform online verification and restoration. The whole FPGA is considered as a static memory whose content is the configuration data. Hamming codes - an error correcting code, are used to detect and correct the configuration data written to FPGA. The extra Hamming parity data are stored in the Block Memory of the FPGA when configuring the device. A configuration controller that consumes a small portion of the FPGA resources is specifically used to implement the operations of readback, verification, correcting the configuration data and partial re-configuration. The FPGA itself continuously performs the self-checking and restoration after the initial configuration is completed. There is no extra memory or controlling device required outside the FPGA.