Multi-order transmission line-radial stub networks for broadband impedance matching and power combining in a watt-level silicon power amplifier

Abstract

In this paper, multi-order, on-chip transmission line-radial stub ladder networks are designed to perform fundamental and harmonic impedance matching and power combining in a broadband silicon power amplifier. A 16-40GHz, 1W PA with integrated 50Ω output matching and power combining is designed in a 130nm SiGe BiCMOS process. The PA achieves a peak gain of 23.8dB and a maximum single ended output power of 30.6dBm with 21.9% power-added efficiency (PAE). On chip transmission line-radial stub-based matching and combing networks are designed and optimized for maximum efficiency to provide optimum load conditions at fundamental and harmonic frequencies and to combine the power of 16 separate amplifiers with minimized passive loss. Load pull simulations are performed in the frequency range considering load conditions up to the 5th harmonic. The simulated total loss from the output matching and the 16-to-1 combining network is less than 2.9dB in the entire frequency band.