4.4 A 1.3TOPS/W @ 32GOPS Fully Integrated 10-Core SoC for IoT End-Nodes with 1.7μW Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode

D. Rossi, Francesco Conti, M. Eggimann, Stefan Mach, Alfio Di Mauro, M. Guermandi, Giuseppe Tagliavini, A. Pullini, Igor Loi, Jie Chen, E. Flamand, L. Benini
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引用次数: 24

Abstract

The Internet-of-Things requires end-nodes with ultra-low-power always-on capability for long battery lifetime, as well as high performance, energy efficiency, and extreme flexibility to deal with complex and fast-evolving near-sensor analytics algorithms (NSAAs). We present Vega, an always-on IoT end-node SoC capable of scaling from a 1.7$\mu$ W fully retentive COGNITIVE sleep mode up to 32.2GOPS (@49.4mW) peak performance on NSAAs, including mobile DNN inference, exploiting 1.6MB of state- retentive SRAM, and 4MB of non-volatile MRAM. To meet the performance and flexibility requirements of NSAAs, the SoC features 10 RISC-V cores: one core for SoC and IO management and a 9-core cluster supporting multi-precision SIMD integer and floating- point computation. Two programmable machine-learning (ML) accelerators boost energy efficiency in sleep and active state, respectively.
4.4 1.3TOPS/W @ 32GOPS完全集成的10核SoC,用于物联网终端节点,具有基于mram的状态保持睡眠模式的1.7μW认知唤醒
物联网要求终端节点具有超低功耗、长电池寿命、高性能、能效和极高的灵活性,以应对复杂且快速发展的近传感器分析算法(NSAAs)。我们提出了Vega,一种始终在线的物联网终端节点SoC,能够从1.7$ $ mu$ $ W的完全保留认知睡眠模式扩展到NSAAs上的32.2GOPS (49.4 mw)峰值性能,包括移动DNN推理,利用1.6MB的状态保留SRAM和4MB的非易失性MRAM。为了满足NSAAs的性能和灵活性要求,SoC具有10个RISC-V内核:一个内核用于SoC和IO管理,一个9核集群支持多精度SIMD整数和浮点计算。两个可编程机器学习(ML)加速器分别提高睡眠和活动状态下的能量效率。
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