Backside illuminated SPAD image sensor with 7.83μm pitch in 3D-stacked CMOS technology

T. A. Abbas, N. Dutton, Oscar Almer, S. Pellegrini, Y. Henrion, R. Henderson
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引用次数: 109

Abstract

We present the first 3D-stacked backside illuminated (BSI) single photon avalanche diode (SPAD) image sensor capable of both single photon counting (SPC) intensity, and time resolved imaging. The 128×120 prototype has a pixel pitch of 7.83 μm making it the smallest pixel reported for SPAD image sensors. A low power, high density 40nm bottom tier hosts the quenching front end and processing electronics while an imaging specific 65nm top tier hosts the photo-detectors with a 1-to-1 hybrid bond connection [1]. The SPAD exhibits a median dark count rate (DCR) below 200cps at room temperature and 1V excess bias, and has a peak photon detection probability (PDP) of 27.5% at 640nm and 3 V excess bias.
基于3d堆叠CMOS技术的7.83μm节距背面照明SPAD图像传感器
我们提出了第一个3d堆叠背照(BSI)单光子雪崩二极管(SPAD)图像传感器,能够同时实现单光子计数(SPC)强度和时间分辨成像。128×120原型的像素间距为7.83 μm,是SPAD图像传感器中最小的像素。低功率,高密度40nm底层承载淬火前端和处理电子器件,而成像专用的65nm顶层承载具有1对1混合键连接的光电探测器[1]。SPAD在室温和1V偏置下的中位暗计数率(DCR)低于200cps,在640nm和3v偏置下的峰值光子检测概率(PDP)为27.5%。
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