REHAD: Using Low-Frequency Reconfigurable Hardware for Cache Side-Channel Attacks Detection

Yuxiao Mao, Vincent Migliore, V. Nicomette
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引用次数: 5

Abstract

Cache side-channel attacks consist, for a malicious process, to infer the current state of the cache by measuring the time it takes to access the memory, and indirectly gain knowledge about other processes sharing this same physical cache. Because cache side-channel attacks leverage a hardware leakage without requiring any physical access to the devices, they represent very serious threats. Among the runtime detection techniques for cache side-channel attacks, hardware solutions are usually fine-grained and benefit from less performance overhead than software solutions. However, they are not flexible enough to suit the rapid evolution and appearance of software attacks. In this paper we describe REHAD, a novel attack detection architecture that uses reconfigurable hardware. More precisely, it includes a hardware detection module that can be reconfigured by means of a trusted software kernel, to adapt to the level of threats and to detect new attacks. This architecture also benefits from hardware parallelism to fill the frequency gap between reconfigurable hardware and core processor. REHAD has been integrated into the ORCA softcore RISCV on a FPGA and two common cache side-channel attacks have been successfully detected.
REHAD:使用低频可重构硬件进行缓存侧信道攻击检测
对于恶意进程来说,缓存侧通道攻击包括通过测量访问内存所需的时间来推断缓存的当前状态,并间接获取共享同一物理缓存的其他进程的信息。由于缓存侧通道攻击利用硬件泄漏而不需要对设备进行任何物理访问,因此它们代表了非常严重的威胁。在缓存侧通道攻击的运行时检测技术中,硬件解决方案通常是细粒度的,并且比软件解决方案的性能开销更小。然而,它们不够灵活,无法适应软件攻击的快速演变和出现。本文描述了一种使用可重构硬件的新型攻击检测体系结构REHAD。更准确地说,它包括一个硬件检测模块,可以通过一个可信的软件内核重新配置,以适应威胁的级别和检测新的攻击。这种架构还受益于硬件并行性,以填补可重构硬件和核心处理器之间的频率差距。REHAD已集成到FPGA上的ORCA软核RISCV中,并成功检测到两种常见的缓存侧信道攻击。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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