A New dv/dt Filter Design Method using the Voltage Reflection Theory

Abstract

This paper proposes a dv/dt suppression second-order RLC filter for an inverter-cable-high impedance load system. The dv/dt filter placed at the inverter output is designed purposely to minimize excessive voltage overshoot at the load terminal by reducing dv/dt or voltage pulse rise time. A 500 V unit pulse of inverter source is connected over several cable lengths to a high impedance load with a load reflection coefficient of 0.9. Voltage overshoot in terms of the ratio of rise time to propagation time is analyzed and verified by Matlab/Simulink environment. In addition, a new design method for the second-order dv/dt filter is proposed. From the simulation results, the dv/dt filter is able to reduce a high load peak voltage of approximately 950 V to 588.6 V in a 50m inverter-cable-load system, and increase to 1 µs of rise time at the load terminal.