Image Display using FPGA with BRAM and VGA Interface for Multimedia Applications

Navaneethan S, S. Nath, Udaya Krishnan M, Sakthekannan M S, Yogavignes B M, Lokesh Krishnaa M
{"title":"Image Display using FPGA with BRAM and VGA Interface for Multimedia Applications","authors":"Navaneethan S, S. Nath, Udaya Krishnan M, Sakthekannan M S, Yogavignes B M, Lokesh Krishnaa M","doi":"10.1109/ICCES57224.2023.10192822","DOIUrl":null,"url":null,"abstract":"Using a Field-Programmable Gate Array, this work aims to develop a multimedia system, on-chip Block RAM (BRAM), and a Video Graphics Array (VGA) interface. The system will be centered around a VGA monitor that will display multimedia information. The BRAM will temporarily store the image data while the FPGA converts it to a format compatible with the VGA display. The system can produce 24-bit color at a resolution of 100x100. Verilog will be used to construct the hardware, whilst Xilinx will be used for simulation. To demonstrate how the system operates, it will be tested on an FPGA development board. This work aims to create a low-cost, high-performance approach for rendering and processing pictures for use in multimedia applications.","PeriodicalId":442189,"journal":{"name":"2023 8th International Conference on Communication and Electronics Systems (ICCES)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 8th International Conference on Communication and Electronics Systems (ICCES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCES57224.2023.10192822","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

Using a Field-Programmable Gate Array, this work aims to develop a multimedia system, on-chip Block RAM (BRAM), and a Video Graphics Array (VGA) interface. The system will be centered around a VGA monitor that will display multimedia information. The BRAM will temporarily store the image data while the FPGA converts it to a format compatible with the VGA display. The system can produce 24-bit color at a resolution of 100x100. Verilog will be used to construct the hardware, whilst Xilinx will be used for simulation. To demonstrate how the system operates, it will be tested on an FPGA development board. This work aims to create a low-cost, high-performance approach for rendering and processing pictures for use in multimedia applications.
带BRAM和VGA接口的FPGA多媒体图像显示
使用现场可编程门阵列,本工作旨在开发一个多媒体系统,片上块RAM (BRAM)和视频图形阵列(VGA)接口。该系统将围绕一个VGA显示器,将显示多媒体信息。BRAM将临时存储图像数据,而FPGA将其转换为与VGA显示兼容的格式。该系统可以产生分辨率为100x100的24位彩色图像。Verilog将用于构建硬件,而Xilinx将用于模拟。为了演示系统的工作原理,将在FPGA开发板上进行测试。这项工作旨在创造一种低成本,高性能的方法来渲染和处理用于多媒体应用程序的图片。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信