A graph model for investigating memory consistency

Weiwu Hu
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引用次数: 2

Abstract

The complexity of a multiprocessor memory system grows with the endeavors people make to improve the performance. The pseudo and real execution graphs introduced here can formally describe the complex event ordering behavior of the multiprocessor memory system and to verify the correctness of a parallel program under a consistency model. A pseudo execution graph represents the programmer's abstraction of an execution in which memory accesses are simple, atomic operations. A loop in the pseudo execution graph indicates an incorrect execution. A real execution graph represents the hardware designer's abstraction of an execution in which each memory access is a causal sequence of events. A loop in the real execution graph indicates that this execution is impossible to occur. A program is correct if all loops in the pseudo execution graphs cause loops in the corresponding real execution graphs.
研究内存一致性的图模型
随着人们努力提高性能,多处理器存储系统的复杂性也在增长。本文介绍的伪执行图和实执行图可以形式化地描述多处理器内存系统的复杂事件排序行为,并在一致性模型下验证并行程序的正确性。伪执行图表示程序员对执行的抽象,其中内存访问是简单的原子操作。伪执行图中的循环表示执行错误。真实的执行图表示硬件设计者对执行的抽象,其中每个内存访问都是事件的因果序列。实际执行图中的循环表明此执行不可能发生。如果伪执行图中的所有循环导致相应的实际执行图中的循环,则程序是正确的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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