G. Ripamonti, S. Michelis, F. Faccio, S. Saggini, A. Koukab, M. Kayal
{"title":"A Reliability and Efficiency Optimization System for Hard-Switching DC/DC Converters","authors":"G. Ripamonti, S. Michelis, F. Faccio, S. Saggini, A. Koukab, M. Kayal","doi":"10.1109/NEWCAS.2018.8585694","DOIUrl":null,"url":null,"abstract":"The Large Hadron Collider experiments at CERN will use power distribution schemes relying on integrated buck DCIDC converters. Due to the radiation-hardness requirements, the devices used for the development of such converters will have a voltage rating which is close to the converters’ input voltage. The voltage spikes generated during the hard-switching operation can affect the reliability of such low-voltage MOSFETs. A fixed and sufficiently small gate driver current for the high-side switch could be used to guarantee the reliable operation even in the worst-case conditions in terms of input voltage, output current, temperature and process variations. Nevertheless, this would result in a suboptimal efficiency in all the other working conditions. This work presents an integrated system than monitors in real-time the voltage stress, and adjusts the gate driver current to achieve maximum efficiency in all conditions, while ensuring compliance with the reliability specifications. A buck converter including the voltage peak detector and an adjustable gate driver current has been designed in a 130 nm technology, demonstrating the functionality of the voltage stress monitoring system.","PeriodicalId":112526,"journal":{"name":"2018 16th IEEE International New Circuits and Systems Conference (NEWCAS)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 16th IEEE International New Circuits and Systems Conference (NEWCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NEWCAS.2018.8585694","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
The Large Hadron Collider experiments at CERN will use power distribution schemes relying on integrated buck DCIDC converters. Due to the radiation-hardness requirements, the devices used for the development of such converters will have a voltage rating which is close to the converters’ input voltage. The voltage spikes generated during the hard-switching operation can affect the reliability of such low-voltage MOSFETs. A fixed and sufficiently small gate driver current for the high-side switch could be used to guarantee the reliable operation even in the worst-case conditions in terms of input voltage, output current, temperature and process variations. Nevertheless, this would result in a suboptimal efficiency in all the other working conditions. This work presents an integrated system than monitors in real-time the voltage stress, and adjusts the gate driver current to achieve maximum efficiency in all conditions, while ensuring compliance with the reliability specifications. A buck converter including the voltage peak detector and an adjustable gate driver current has been designed in a 130 nm technology, demonstrating the functionality of the voltage stress monitoring system.