Benchmarking Monolithic 3D Integration for Compute-in-Memory Accelerators: Overcoming ADC Bottlenecks and Maintaining Scalability to 7nm or Beyond

Abstract

This paper presents 3D NeuroSim, a benchmark framework of monolithic 3D (M3D) integrated compute-in-memory (CIM) accelerators. To address the challenges of analog-to-digital converter (ADC) overhead and scaling limitations caused by high write voltage in emerging nonvolatile memory (eNVM), we propose partitioning the circuit modules in hybrid technology nodes across two stacked tiers with massive inter-tier vias. This framework features versatile back-end-of-line (BEOL)-compatible transistors, including laser-recrystallized silicon transistor and oxide transistor, and analyzes the thermal profile for M3D integration. Finally, we benchmark the CIM accelerators for VGG-8 on CIFAR-10 and reveal the substantial benefits in energy efficiency of a hybrid M3D architecture (45nm eNVM array+7nm ADC and logic).