A Simple Estimation Technique for Timing Skew Mismatch in Time-Interleaved Analog-to-Digital Converter Systems

Xin Li, Desheng Ding, Jianhui Wu
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Abstract

Timing skew mismatch in time-interleaved analog-to-digital converters (TIADCs) greatly degrade the dynamic performance of the TIADC, which can be improved effectively by digital estimation and correction techniques. In this paper, a simple and efficient timing skew estimation technique for M- channel time-interleaved analogue-to-digital converters is proposed. Based on digital mixing and inverse trigonometric calculation, timing skew mismatch can be extracted at one time by injecting a known test sinusoidal signal. Compared with the previous foreground techniques, the proposed technique has a higher computational efficiency and looser limitations. Simulation results show that, for a four-channel 12-bit TIADC model, with $f_{in}/f_{s}=0.41$, signal to noise and distortion ratio (SNDR) and spurious free dynamic range (SFDR) are improved from 24.1dB and 27.4dB to 74.0dB and 106.8dB, respectively.
时间交错模数转换器系统中时序倾斜失配的一种简单估计技术
时间交错模数转换器(TIADC)的时序倾斜失配严重降低了TIADC的动态性能,通过数字估计和校正技术可以有效地改善这一问题。本文提出了一种简单有效的M通道时交错模数转换器时偏估计技术。基于数字混频和反三角计算,通过注入一个已知的测试正弦信号,可以一次提取出时序偏差失配。与以往的前景技术相比,该技术具有更高的计算效率和更宽松的限制。仿真结果表明,对于$f_{in}/f_{s}=0.41$的4通道12位TIADC模型,信噪比和失真比(SNDR)和无杂散动态范围(SFDR)分别从24.1dB和27.4dB提高到74.0dB和106.8dB。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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