A 60GHz 186.5dBc/Hz FoM Quad-Core Fundamental VCO Using Circular Triple-Coupled Transformer with No Mode Ambiguity in 65nm CMOS

Abstract

The recent development of the 5th-generation (5G) communication sytems has set increasingly strict requirements on the spectral purity of millimeter-wave (mm-wave) local oscillators (LO). Low phase noise is crucial to enable advanced modulation formats for high communication data-rates. Much effort has been made to improve the phase noise performance of the mm-wave LOs. A lower frequency voltage-controlled oscillator (VCO) together with a frequency multiplier can lower the phase noise [1]; however, the high-order harmonic components in VCOs are usually very weak, which requires additional power-consuming mm-wave amplification stages to satisfy the LO swing requirement. For single mm-wave fundamental VCOs, the minimal achievable phase noise is bounded by the smallest realizable inductor that displays a high Q factor. To avoid the “small inductor” problem, N oscillators with relatively large inductors can be coupled together to improve the phase noise by $10\log _{10}(\mathrm{N})[2 -5]$. Authors in [2] presented a quad-core bipolar VCO working around 15GHz as shown in Fig. 20.3.1 (Left), where four one-turn inductors are star-connected with the active cores placed in the middle. Resistors (Rc) are added to avoid undesired multi-tone concurrent oscillations. However, the four one-turn inductors still suffer from the Q-factor drop when the inductance decreases, thus limiting the highest achievable oscillation frequency. Besides, $\mathrm{V}_{DD}$ at the inductor central taps and $\mathrm{V}_{SS}$ at the tail current source are far from each other, making the $\mathrm{V}_{DD}- \mathrm{V}_{SS}$ current return path long. This path has to be carefully modeled in simulations, especially in the mm-wave frequency range, where the return path inductance is comparable to the tank inductance. Instead of the star-connected topology, authors in [3] presented a circular-connected quad-core VCO working close to 30GHz, where the inductors are arranged in a circular topology as shown in Fig. 20.3.1 (Middle). The destructive coupling between the inner edges inside a small inductor is eliminated. Therefore, the minimal realizable inductance is further reduced while keeping a high Q factor. The central taps are connected by narrow metal traces to avoid latching and mode ambiguity. The VCO adopts a CMOS configuration, which limits the highest operating frequency. It would be difficult for this topology to be adopted in NMOS-only VCOs because the central taps have to be resistively isolated to suppress unwanted modes; therefore, they cannot be connected to the AC-ground power supply simultaneously as required by the NMOS-only configuration. Due to the lack of harmonic impedance control in the circular inductors, extra tail filtering transformers are added to improve the phase noise.