Y. Kinebuchi, T. Nakajima, V. Ganapathy, L. Iftode
{"title":"Core-Local Memory Assisted Protection","authors":"Y. Kinebuchi, T. Nakajima, V. Ganapathy, L. Iftode","doi":"10.1109/PRDC.2010.48","DOIUrl":null,"url":null,"abstract":"This paper proposes a method for protecting data by leveraging core-local memory. Core-local (or software coherency managed) memory is a programmable memory which is equipped in a core of multicore processors. It is accessible from the core with low latency compared to a shared cache and a shared main memory. This is equipped in multicore processors in order to exploit locality of threads and to improve scalability. In addition to low latency, core-local memory is invisible and inaccessible from the other cores. We leverage this characteristic to provide a novel mechanism of protecting an OS kernel beside MMU based address space separation.","PeriodicalId":382974,"journal":{"name":"2010 IEEE 16th Pacific Rim International Symposium on Dependable Computing","volume":"111 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE 16th Pacific Rim International Symposium on Dependable Computing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PRDC.2010.48","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
This paper proposes a method for protecting data by leveraging core-local memory. Core-local (or software coherency managed) memory is a programmable memory which is equipped in a core of multicore processors. It is accessible from the core with low latency compared to a shared cache and a shared main memory. This is equipped in multicore processors in order to exploit locality of threads and to improve scalability. In addition to low latency, core-local memory is invisible and inaccessible from the other cores. We leverage this characteristic to provide a novel mechanism of protecting an OS kernel beside MMU based address space separation.