{"title":"Superlattice structures for nanocrystalline silicon solar cells","authors":"A. Madhavan, V. Dalal, M. Noack","doi":"10.1109/EIT.2008.4554333","DOIUrl":null,"url":null,"abstract":"We propose two new techniques for enhancing the performance of nanocrystalline silicon solar cells. The first technique involves the use of superlattice structures of amorphous and nanocrystalline silicon layers. We show that the thickness of the amorphous layer is critical in determining the transport properties of the device and that the optimum thickness varies with the nanocrystalline silicon layer thickness. The second design involves the use of high growth temperatures to enhance the grain size. We show that by increasing the grain size, we can attain good device properties, if the intrinsic layer is subjected to post deposition hydrogen anneal while rapidly cooling down. Also we are able to obtain an enhanced response in the infrared quantum efficiency.","PeriodicalId":215400,"journal":{"name":"2008 IEEE International Conference on Electro/Information Technology","volume":"107 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE International Conference on Electro/Information Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EIT.2008.4554333","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
We propose two new techniques for enhancing the performance of nanocrystalline silicon solar cells. The first technique involves the use of superlattice structures of amorphous and nanocrystalline silicon layers. We show that the thickness of the amorphous layer is critical in determining the transport properties of the device and that the optimum thickness varies with the nanocrystalline silicon layer thickness. The second design involves the use of high growth temperatures to enhance the grain size. We show that by increasing the grain size, we can attain good device properties, if the intrinsic layer is subjected to post deposition hydrogen anneal while rapidly cooling down. Also we are able to obtain an enhanced response in the infrared quantum efficiency.