Novel loop structure enables a bit synchronizer to operate over multi-decade data rates

R. Braun
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Abstract

The extraction of a spectral component at the clock frequency is solved by means of an edge detector. The requirement for a constant Q in the bandpass filter is solved by a state variable filter controlled by two multiplying DACs. The phase locked loop is controlled by three multiplying DACs that enable a constant damping factor to be maintained whilst varying the natural frequency very widely.<>
新颖的环路结构使位同步器能够在数十年的数据速率上运行
利用边缘检测器解决了时钟频率下频谱分量的提取问题。带通滤波器中Q值恒定的要求由两个相乘dac控制的状态变量滤波器来解决。锁相环由三个相乘的dac控制,可以保持恒定的阻尼因子,同时非常广泛地改变固有频率。
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