D. Calabró, R. Cipriani, S. Citraro, S. Donati, P. Giannetti, A. Lanza, P. Luciano, D. Magalotti, M. Piendibene
{"title":"The Associative Memory Boards for the FTK processor at ATLAS","authors":"D. Calabró, R. Cipriani, S. Citraro, S. Donati, P. Giannetti, A. Lanza, P. Luciano, D. Magalotti, M. Piendibene","doi":"10.1109/NSSMIC.2013.6829752","DOIUrl":null,"url":null,"abstract":"The Associative Memory (AM) system, a major component of the FastTracker (FTK) processor, is designed to perform pattern matching using the information from the silicon tracking detectors of the ATLAS experiment. It finds track candidates at low resolution that are sent to the track fitting stage. The system has to support challenging data traffic, handled by a group of modern low-cost FPGAs, the Xilinx Artix 7 chips, which have Low-Power Gigabit Transceivers (GTPs). Each GTP is a combined transmitter and receiver capable of operating at data rates up to 7 Gb/s. The paper reports on the design and initial tests of the most recent version of the AM system, based on the new AM chip design which uses serialized I/O. An estimation of the power consumption of the final system is also provided and the cooling system design is described. The first cooling test results are reported.","PeriodicalId":246351,"journal":{"name":"2013 IEEE Nuclear Science Symposium and Medical Imaging Conference (2013 NSS/MIC)","volume":"107 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE Nuclear Science Symposium and Medical Imaging Conference (2013 NSS/MIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NSSMIC.2013.6829752","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The Associative Memory (AM) system, a major component of the FastTracker (FTK) processor, is designed to perform pattern matching using the information from the silicon tracking detectors of the ATLAS experiment. It finds track candidates at low resolution that are sent to the track fitting stage. The system has to support challenging data traffic, handled by a group of modern low-cost FPGAs, the Xilinx Artix 7 chips, which have Low-Power Gigabit Transceivers (GTPs). Each GTP is a combined transmitter and receiver capable of operating at data rates up to 7 Gb/s. The paper reports on the design and initial tests of the most recent version of the AM system, based on the new AM chip design which uses serialized I/O. An estimation of the power consumption of the final system is also provided and the cooling system design is described. The first cooling test results are reported.