A 0.5 um Flash Technology suitable for Low Voltage Embedded Applications

J.K. Yeh, H. Su, Y. Lin, C.D. Shieh, D. Kuo, M. Liang, G. Tao, F. List, L. Shi, R. Colclaser, N. Tandan, K. Chen, M. Chen, A. Gorkum
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引用次数: 2

Abstract

High density, low supply voltage, low power consumption and fast program/erase flash memory are important in data storage for applications in portable electronic products. In this paper we present a 0.5 um low voltage flash technology embedded in a standard 0.5 um Ti-salicide logic process. Stacked gate flash memory cell is chosen and both programming and erase are done through by bi-directional Fowler-Nordheim tunneling. Single cell programming and erasing times are 5ms and 10ms, respectively. With page mode programming, a programming time of 5us per bit are achieved. The single cell endurance is better than 10 cycles.
适用于低电压嵌入式应用的0.5 um闪存技术
高密度、低供电电压、低功耗和快速的程序/擦除闪存在便携式电子产品的数据存储中具有重要意义。在本文中,我们提出了一种嵌入在标准的0.5 um钛酸盐逻辑过程中的0.5 um低压闪存技术。采用堆叠栅极闪存单元,通过双向Fowler-Nordheim隧道实现编程和擦除。单细胞编程和擦除时间分别为5ms和10ms。使用页面模式编程,可以实现每比特5us的编程时间。单电池续航能力优于10次循环。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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