T. Nakajima, Y. Kinebuchi, H. Shimada, Alexandre Courbot, Tsung-Han Lin
{"title":"Temporal and spatial isolation in a virtualization layer for multi-core processor based information appliances","authors":"T. Nakajima, Y. Kinebuchi, H. Shimada, Alexandre Courbot, Tsung-Han Lin","doi":"10.1109/ASPDAC.2011.5722268","DOIUrl":null,"url":null,"abstract":"A virtualization layer makes it possible to compose multiple functionalities on a multi-core processor with minimum modifications of OS kernels and applications. A multi-core processor is a good candidate to compose various software independently developed for dedicated processors into one multi-core processor to reduce both the hardware and development cost. In this paper, we present SPUMONE, which is a virtualization layer suitable for developing multi-core processor based-information appliances.","PeriodicalId":316253,"journal":{"name":"16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-01-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.2011.5722268","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 16
Abstract
A virtualization layer makes it possible to compose multiple functionalities on a multi-core processor with minimum modifications of OS kernels and applications. A multi-core processor is a good candidate to compose various software independently developed for dedicated processors into one multi-core processor to reduce both the hardware and development cost. In this paper, we present SPUMONE, which is a virtualization layer suitable for developing multi-core processor based-information appliances.