H.H.A. Hatem, M. El-Matbouly, N. Hamdy, K. Shehata
{"title":"VLSI architecture of QMF for DWT integrated system","authors":"H.H.A. Hatem, M. El-Matbouly, N. Hamdy, K. Shehata","doi":"10.1109/MWSCAS.2001.986253","DOIUrl":null,"url":null,"abstract":"Wavelet transform has become a suitable tool for DSP signal manipulation especially in image compression. A VLSI implementation of a CMOS circuit realizing a Discrete Wave Transform ( DWT) for Daubecchie's 6 using a novel realization of Quadrature Mirror Filter [QMF] is presented. The new design of the DWT system which is based on a new Finite Impulse Response filter FIR requires less Si area to be implemented, since the FIR filter is implemented using mixed parallel / sequential architecture resulting in reducing the number of binary multipliers used which are the major bottle neck governing the performance of the DSP processing. Consequently, it results in a much faster system. Moreover, the use of parallel multipliers results in less power dissipation.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2001.986253","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
Wavelet transform has become a suitable tool for DSP signal manipulation especially in image compression. A VLSI implementation of a CMOS circuit realizing a Discrete Wave Transform ( DWT) for Daubecchie's 6 using a novel realization of Quadrature Mirror Filter [QMF] is presented. The new design of the DWT system which is based on a new Finite Impulse Response filter FIR requires less Si area to be implemented, since the FIR filter is implemented using mixed parallel / sequential architecture resulting in reducing the number of binary multipliers used which are the major bottle neck governing the performance of the DSP processing. Consequently, it results in a much faster system. Moreover, the use of parallel multipliers results in less power dissipation.