Ananya Choudhury, A. Srinivasan, Aditya R Kattimani, S. Siddamal, Shraddha B Hiremath
{"title":"Microblaze Implementation of GPS","authors":"Ananya Choudhury, A. Srinivasan, Aditya R Kattimani, S. Siddamal, Shraddha B Hiremath","doi":"10.2991/ahis.k.210913.037","DOIUrl":null,"url":null,"abstract":"The accuracy and efficiency of a Global Positioning System (GPS) is a critical parameter especially for surveillance and automation purposes. The design of such a system which can not only provide high accuracy and efficiency but also is easily configurable enhances its applications largely for embedded systems. In this paper, the authors have proposed a design of a GPS implementation using a Microblaze which is a Xilinx based Field Programmable Gate Array (FPGA) soft core microprocessor that has over seventy user configurable options, optional Memory Management Unit (MMU) and a five-stage pipeline for maximum performance. The proposed design is used to track and route the path travelled by the user on a map and compute the distance. The Microblaze is used to connect and interface various configurable peripherals like USB UART and LEDs to implement a GPS using the AXI interface of an Arty A7-100T FPGA Evaluation Board. A comparison of the proposed design with respect to the performance parameters has been drawn to analyse the merits and specifications of the system.","PeriodicalId":417648,"journal":{"name":"Proceedings of the 3rd International Conference on Integrated Intelligent Computing Communication & Security (ICIIC 2021)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 3rd International Conference on Integrated Intelligent Computing Communication & Security (ICIIC 2021)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.2991/ahis.k.210913.037","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The accuracy and efficiency of a Global Positioning System (GPS) is a critical parameter especially for surveillance and automation purposes. The design of such a system which can not only provide high accuracy and efficiency but also is easily configurable enhances its applications largely for embedded systems. In this paper, the authors have proposed a design of a GPS implementation using a Microblaze which is a Xilinx based Field Programmable Gate Array (FPGA) soft core microprocessor that has over seventy user configurable options, optional Memory Management Unit (MMU) and a five-stage pipeline for maximum performance. The proposed design is used to track and route the path travelled by the user on a map and compute the distance. The Microblaze is used to connect and interface various configurable peripherals like USB UART and LEDs to implement a GPS using the AXI interface of an Arty A7-100T FPGA Evaluation Board. A comparison of the proposed design with respect to the performance parameters has been drawn to analyse the merits and specifications of the system.